**** 05/02/08 17:13:00 ********* PSpice 9.0 (Nov 1998) ******** ID# 0 ******** ** circuit file for profile: Thyrect1 **** CIRCUIT DESCRIPTION ****************************************************************************** ** WARNING: DO NOT EDIT OR DELETE THIS FILE *Libraries: * Local Libraries : .LIB ".\scr_subckt.lib" .LIB ".\thy_trig_subckt.lib" * From [PSPICE NETLIST] section of pspice.ini file: .lib "nom.lib" *Analysis directives: .TRAN 0 50ms 0 50us SKIPBP .OPTIONS ABSTOL= 1.0u .OPTIONS GMIN= 1u .OPTIONS ITL1= 400 .OPTIONS ITL4= 100 .PROBE *Netlist File: .INC "thyrect1-SCHEMATIC1.net" *Alias File: **** INCLUDING thyrect1-SCHEMATIC1.net **** * source THYRECT1 R_Ld_Rp N00038 N00091 {200k} L_Ld_L N00038 N00091 {20mH} IC={0A} X_SCR_SUBCKT1 N00042 GP1 N00038 SCR_SUBCKT params: state=0 X_SCR_SUBCKT2 0 GP3 N00038 SCR_SUBCKT params: state=0 X_SCR_SUBCKT3 N00079 GP4 N00042 SCR_SUBCKT params: state=0 X_SCR_SUBCKT4 N00079 GP2 0 SCR_SUBCKT params: state=0 X_THY_TRIG_SUBCKT1 C GP1 VS THY_TRIG_SUBCKT params: f=60 X_THY_TRIG_SUBCKT2 C GP4 N00475 THY_TRIG_SUBCKT params: f=60 E_GAIN1 N00475 0 VALUE {-1 * V(VS)} E_E1 GP3 0 GP4 0 1 E_E2 GP2 0 GP1 0 1 R_Rs N00032 N00042 1m R_RLoad N00091 N00079 5.0 E_ABM1 C 0 VALUE { 0.25 } V_Vs VS 0 +SIN 0 170 60 0 0 0 R_Ls1_Rp VS N00069 {2k} L_Ls1_L VS N00069 {0.2mH} IC={0A} R_Ls2_Rp N00069 N00032 {10k} L_Ls2_L N00069 N00032 {1mH} IC={0A} **** RESUMING thyrect1-schematic1-thyrect1.sim.cir **** .INC "thyrect1-SCHEMATIC1.als" **** INCLUDING thyrect1-SCHEMATIC1.als **** .ALIASES _ Ld(+=N00038 -=N00091 ) R_Ld_Rp Ld.Rp(1=N00038 2=N00091 ) L_Ld_L Ld.L(1=N00038 2=N00091 ) _ _(Ld.+=N00038) _ _(Ld.-=N00091) X_SCR_SUBCKT1 SCR_SUBCKT1(A=N00042 G=GP1 K=N00038 ) X_SCR_SUBCKT2 SCR_SUBCKT2(A=0 G=GP3 K=N00038 ) X_SCR_SUBCKT3 SCR_SUBCKT3(A=N00079 G=GP4 K=N00042 ) X_SCR_SUBCKT4 SCR_SUBCKT4(A=N00079 G=GP2 K=0 ) X_THY_TRIG_SUBCKT1 THY_TRIG_SUBCKT1(C=C P=GP1 V=VS ) X_THY_TRIG_SUBCKT2 THY_TRIG_SUBCKT2(C=C P=GP4 V=N00475 ) E_GAIN1 GAIN1(OUT=N00475 IN=VS ) E_E1 E1(3=GP3 4=0 1=GP4 2=0 ) E_E2 E2(3=GP2 4=0 1=GP1 2=0 ) R_Rs Rs(1=N00032 2=N00042 ) R_RLoad RLoad(1=N00091 2=N00079 ) E_ABM1 ABM1(OUT=C ) V_Vs Vs(+=VS -=0 ) _ Ls1(+=VS -=N00069 ) R_Ls1_Rp Ls1.Rp(1=VS 2=N00069 ) L_Ls1_L Ls1.L(1=VS 2=N00069 ) _ _(Ls1.+=VS) _ _(+=VS) _ _(Ls1.-=N00069) _ Ls2(+=N00069 -=N00032 ) R_Ls2_Rp Ls2.Rp(1=N00069 2=N00032 ) L_Ls2_L Ls2.L(1=N00069 2=N00032 ) _ _(Ls2.+=N00069) _ _(Ls2.-=N00032) _ _(Gp4=GP4) _ _(c=C) _ _(Gp3=GP3) _ _(Gp2=GP2) _ _(Gp1=GP1) _ _(vs=VS) _ _(VS=VS) _ _(GP1=GP1) _ _(GP2=GP2) _ _(GP3=GP3) _ _(C=C) _ _(GP4=GP4) .ENDALIASES **** RESUMING thyrect1-schematic1-thyrect1.sim.cir **** .END **** 05/02/08 17:13:00 ********* PSpice 9.0 (Nov 1998) ******** ID# 0 ******** ** circuit file for profile: Thyrect1 **** Diode MODEL PARAMETERS ****************************************************************************** X_SCR_SUBCKT1.mod_D1 IS 10.000000E-15 RS 1.000000E-03 X_SCR_SUBCKT2.mod_D1 IS 10.000000E-15 RS 1.000000E-03 X_SCR_SUBCKT3.mod_D1 IS 10.000000E-15 RS 1.000000E-03 X_SCR_SUBCKT4.mod_D1 IS 10.000000E-15 RS 1.000000E-03 **** 05/02/08 17:13:00 ********* PSpice 9.0 (Nov 1998) ******** ID# 0 ******** ** circuit file for profile: Thyrect1 **** Voltage Controlled Switch MODEL PARAMETERS ****************************************************************************** X_SCR_SUBCKT1.mod_S1 RON 1.000000E-03 ROFF 1.000000E+06 VON 1 VOFF 0 X_SCR_SUBCKT2.mod_S1 RON 1.000000E-03 ROFF 1.000000E+06 VON 1 VOFF 0 X_SCR_SUBCKT3.mod_S1 RON 1.000000E-03 ROFF 1.000000E+06 VON 1 VOFF 0 X_SCR_SUBCKT4.mod_S1 RON 1.000000E-03 ROFF 1.000000E+06 VON 1 VOFF 0 JOB CONCLUDED TOTAL JOB TIME .80